Memory controllers for mixed-time-criticality systems : architectures, methodologies and trade-offs / Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens.
"This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memor...
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Main Authors: | , , , |
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Format: | Ebook |
Language: | English |
Published: |
Switzerland :
Springer,
[2016]
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Series: | Embedded systems (Springer (Firm))
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Subjects: | |
Online Access: | Springer eBooks |
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100 | 1 | |a Goossens, Sven, |e author. | |
245 | 1 | 0 | |a Memory controllers for mixed-time-criticality systems : |b architectures, methodologies and trade-offs / |c Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens. |
264 | 1 | |a Switzerland : |b Springer, |c [2016] | |
300 | |a 1 online resource (xxvii, 202 pages). | ||
336 | |a text |b txt |2 rdacontent | ||
337 | |a computer |b c |2 rdamedia | ||
338 | |a online resource |b cr |2 rdacarrier | ||
490 | 1 | |a Embedded systems, |x 2193-0163 | |
504 | |a Includes bibliographical references. | ||
505 | 0 | 0 | |t Introduction -- |t Reconfigurable Real-Time Memory Controller Architecture -- |t Memory Patterns -- |t Cycle-Accurate SDRAM Power Modeling -- |t Power/Performance Trade-Offs -- |t Conservative Open-Page Policy -- |t Reconfiguration -- |t Related Work -- |t Conclusions and Future Work. |
520 | |a "This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in System C and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template."--Publisher's website. | ||
588 | 0 | |a Online resource; title from PDF title page (EBSCO, viewed April 19, 2016). | |
650 | 0 | |a Embedded computer systems |x Programming. |9 783451 | |
650 | 0 | |a Dynamic random access memory. |9 379110 | |
650 | 0 | |a Programmable controllers. |9 322817 | |
650 | 0 | |a Real-time data processing. |9 323205 | |
700 | 1 | |a Chandrasekar, Karthik, |e author. | |
700 | 1 | |a Goossens, Kees, |e author. |9 821367 | |
700 | 1 | |a Åkesson, Benny, |d 1977- |e author. |9 459227 | |
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830 | 0 | |a Embedded systems (Springer (Firm)) |x 2193-0163. |9 1082878 | |
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