Book
High Speed CPU Simulation Using LTU Dynamic Binary Translation.
| Title: | High Speed CPU Simulation Using LTU Dynamic Binary Translation. |
|---|---|
| Authors: | Jones, Daniel, Topham, Nigel |
| Source: | High Performance Embedded Architectures & Compilers (9783540929895); 2009, p50-64, 15p |
| Abstract: | In order to increase the speed of dynamic binary translation based simulators we consider the translation of large translation units consisting of multiple blocks. In contrast to other simulators, which translate hot blocks or pages, the techniques presented in this paper profile the target program΄s execution path at runtime. The identification of hot paths ensures that only executed code is translated whilst at the same time offering greater scope for optimization. Mean performance figures for the functional simulation of EEMBC benchmarks show the new simulation techniques to be at least 63% faster than basic block based dynamic binary translation. [ABSTRACT FROM AUTHOR] |
| Copyright of High Performance Embedded Architectures & Compilers (9783540929895) is the property of Springer Nature / Books and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| DOI: | 10.1007/978-3-540-92990-1_6 |
| Database: | Complementary Index |
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