Conference
A high performance 3.97 /spl mu/m/sup 2/ CMOS SRAM technology using self-aligned local interconnect and copper interconnect metallization
| Title: | A high performance 3.97 /spl mu/m/sup 2/ CMOS SRAM technology using self-aligned local interconnect and copper interconnect metallization |
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| Authors: | Woo, M., Bhat, M., Craig, M., Kenkare, P., Wnag, X., Tolic, F., Chuang, H., Parihar, S., Schmidt, J., Terpolilli, L., Pena, R., Derr, D., Cave, N., Crabtree, P., Capetillo, M., Filipiak, S., Lii, T., Nagy, A., O'Meara, D., Vuong, T., Blackwell, M., Larson, R., Wilson, M., Hayden, J., Venkatesan, S., Tsui, P., Gilbert, P., Perera, A., Subramanian, C., McNelly, T., Misra, V., Islam, R., Smith, B., Farkas, J., Watts, D., Denning, D., Garcia, S., Frisa, L., Iyer, S., Lage, C. |
| Source: | 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216) VLSI technology VLSI Technology, 1998. Digest of Technical Papers. 1998 Symposium on. :12-13 1998 |
| Relation: | 1998 Symposium on VLSI Technology Digest of Technical Papers |
| DOI: | 10.1109/VLSIT.1998.689179 |
| Database: | IEEE Xplore Digital Library |